ModelSim
7766 - iCEcube2 Modelsim: How do I run Timing simulation for iCECube2 Devices?
In order to ran through Timing simulation for iCECube2 Devices, You would need the following Libraries: 1) sb_ice_ipenc_modelsim.v [Optional: Add this if Hardened IPs are present in your design, Example: SPI, i2C] 2) sb_ice_lc.v 3) sb_ice_syn.v 4) ...
6914 - Power Manager II: User is having issue to get simulation work with their own design, which apparently has open '(' and close ')' bracket in their .PAC file name.
Description: PAC-Designer is an old tool developed with some limitation in accepting the file name. For example: PMGR_AFMB-Rev2_(PLD-min)_jm_050323_v3.PAC The Waveform Editor is supposed to show after simulation completes, but it does not happen for ...
1051 - Modelsim Lattice Edition: Simulation: Why does the simulation show the output clock phase constantly shifting with respect to the input clock in a PLL?
Modelsim Lattice Edition: Simulation: This phenomenon can occur if you force the simulator into an incorrect timescale. If a PLL is generated with a phase shift on the outputs, and the simulator is forced to an incorrect timescale by using a "-t " ...
4684 - Are iCE40 simulations supported in third-party simulation tools, such as Cadence Incisive Enterprise Simulator?
The Hard IP simulation support for iCE40 is only available in ModelSim and Aldec Simulators. The sb_ice_ipenc_modelsim.v library is encrypted with a ModelSim Key, so it cannot be used in the Cadence Simulator.
2165 - Simulation: Steps to compile/elaborate a SERDES based design in NC-Verilog?
Simulation: Compiling/elaborating a SERDES based design requires pre-compiling the SERDES model. Follow the steps below to compile the Lattice SERDES model, revise your library definition file, and compile and elaborate your design. Unzip the ...
947 - Diamond: I/O: Can I emulate open drain IOs in simulations?
Diamond: I/O: An open drain IO drives output high as a 'Z' and drives low as a '0'. This type of IOs is often used when multiple devices are connected to a bus. On devices which do not have a open drain option you can emulate an open drain circuit ...
6027 - Modelsim: How do I convert macro from AHDL to Modelsim since Crosslink IP simulation script is based on Aldec?
Please try the following notes for converting .do files from Aldec to Modelsim: Convert AHDL do file to Modelsim do file 1. Update the generated AHDL main *_run.do file and replace AHDL work library with Modelsim work library creation steps. Example: ...
2385 - Modelsim: After executing the orc_cmpl.bat ModelSim VHDL library compilation script, why do I get errors about unexpanded library elements when I compile my design?
The following online software documents explain how to compile the VHDL source library files for the stand-alone ModelSim flow: from the Lattice Diamond software tool: select Help-> Lattice Diamond Help. In the new pop-up web browser, select ...
7223 - Radiant 2023.2 SP1: Why does Lattice PCIe X4 IP v2.3.1 ModelSim simulation using Radiant 2023.2 SP1 show an error "Fatal: (vsim-3381) Obsolete library format for design unit. Design unit ../RadiantIPLocal/latticesemi.com_ip_pcie_x4_2.3.1/testbench/
Description: This is a bug in Radiant 2023.2 SP1 Solution: The obsolete library format error can be resolved by following the steps below. 1) In the ModelSim environment, on the left-hand window (Library pane) 2) Right-click the library specified on ...
1242 - Simulation: Modelsim: What does "Fatal : Obsolete library format for design unit" Modelsim error mean?
Simulation: Modelsim: If the simulation libraries or your design files are compiled with an older version of Modelsim (for example, Modelsim 6.3) and are now being loaded (VSIM) into a newer version of Modelsim (for example, Modelsim 6.5), you will ...
7180 - ICE40: Where to find the simulation model for ICE40 SPI/I2C core?
Description: The simulation model for Lattice devices are shipped together with their respective tool software library. Solution: For ICE40, user may find the desired simulation model in iCECube2 installation directory: ..\lscc\iCEcube2.2020.12\vhdl
1204 - Simulation: Modelsim: Modelsim failed with the error message:"# ** Error: (vsim-3170) Could not find './work.StimModule_Unknown'."
Description: Modelsim will produce this error when it cannot find a design to be loaded. Error: "# ** Error: (vsim-3170) Could not find './work.StimModule_Unknown'." Workaround: To workaround this, user required to check the module name at the top ...
111 - ModelSim: Fatal: vsim-3381 Obsolete library format for design unit.
Description: Fatal errors may be encountered when a design is loaded in Modelsim (VSIM). Designs using pre-compiled Lattice device models like the Physical Coding Sublayer logic, like the PCSD in the LatticeECP3 FPGA, are compiled for a specific ...
7269 - Modelsim for Diamond 3.13: "Error: (vsim-3043) Unresolved reference to I2C_WAKE"
Description: When simulating EFB in Lattice Diamond 3.13 & earlier version Modelsim OEM, due to the default enabled optimization setting of Modelsim, the error below will occur: "Error: (vsim-3043) Unresolved reference to I2C_WAKE" Solution: This is ...
6880 - Modelsim: How can I make simulation pass when I encounter the minimum resolution FATAL error (VSIM-3693)?
To proceed with simulation, users need to manually add -t ns in vsim such as in the line 19 in the mdo file: vsim -voptargs=+acc -t ns -L work -L pmi_work -L ovi_<device> <test_bench_top> Example: vsim -voptargs=+acc -t ns -L work -L pmi_work -L ...
6816 - OEM Modelsim: How do i fix the errors encountered below?Error: (vsim-3033) Instantiation of 'DPHY' failed. The design unit was not found.
Description: When running simulation on the Lattice Simulation tool, the tool may encounter an error relating to the design unit. This is encountered when the needed libraries are not added in the simulation project. Solution: 1) Go to Modelsim ...
6813 - OEM Modelsim: Error: (vsim-3033) Instantiation of 'SB_HFOSC' failed. The design unit was not found. Error: (vsim-3033) Instantiation of 'SB_IO_OD' failed. The design unit was not found.
Description: Users encounter error as stated in the title when simulating iCECube2 design with hardened IP/Primitives in Modelsim. Solution: The simulation error is encountered if the design is utilizing Hardened Ips/Primitives,the libraries ...
6812 - OEM Modelsim: How do i resolve MSVCR120.dll error when executing Modelsim tool?
Description: When opening modelsim users may encounter an error relating to a .dll file. Solution: To resolve this issue, Install VC2013 redistributable vcredist_x86 to your system as the modelsim relies on its libraries.
6230 - Radiant Modelsim: How to launch Modelsim from the terminal?
To launch the modelsim from terminal, use below command: $ <radiant install path>/lscc/radiant/3.1/modeltech/linuxloem/vsim& Example: $ /home/ubuntu/lscc/radiant/3.1/modeltech/linuxloem/vsim&
7144 - Modelsim error: "Fatal: SDF files require Lattice FPGA Edition primitive library"
Description: In ModelSim, this error can be encountered if necessary libraries are missing to simulate the design. Solution: To work around this issue, please try including the following in the testbench (ecp5u used as an example): library ecp5u; use ...
6125 - ispLEVER Classic: OCSTIMER (On Chip OSC) sample Verilog code has an issue with the RTL simulation using ModelSim
Description: There is a typo error on the ispLEVER Classic OSCTIMER sample Verilog code. Solution: Please change the small letter to an upper case. Please note that Verilog is a case-sensitive language and differences in incorrect cases will affect ...
6124 - Modelsim: Why do I get an error in license when using Modelsim in VirtualBox?
Currently, Modelsim license is not supported when using the software in Virtual machines
7074 - ModelSim: How do you export data to a CSV file?
Description: There is no direct way of exporting as a CSV file in ModelSim without using Tcl scripts or RTL. However, data can be exported as a Tabular list that can then be converted to CSV in an external application like MS Excel. The following ...
7073 - Modelsim 2020.3: When I tried to simulate the routed design (netlist-Verilog), there were a lot of error messages related to the following:# ** Error (suppressible): (vsim-19) Failed to access library 'ovi_ice' at "ovi_ice".# No such file or directory. (errno = ENOENT)
Description: When users implement a post-route simulation with iCEcube2 supported modelsim, they are encountering the below library access error: # ** Error (suppressible): (vsim-19) Failed to access library 'ovi_ice' at "ovi_ice". # No such file or ...
6081 - Modelsim Lattice Edition: What are the limitations of Modelsim Lattice Edition compared to Modelsim PE?
1. Component instance count is limited to 5000. Watermarked components do not count against this limit. Watermarked components have an indicator and these includes components from all the simulation libraries and primitives. If the pre-compiled ...
6070 - How to convert Active-HDL simulation to ModelSim?
Here is the conversion guide using the pixel-to-byte IP as a sample for the ModelSim script: 1. Update the generated AHDL main *_run.do file and replace the AHDL work library with Modelsim work library creation steps. Example: Crosslink Pixel2Byte ...
6062 - Synplify Pro: How to resolve this license checkout unsuccessful: "Checkout failed - synplifypro No such feature exists." ?
Description: Synplify Pro is a third-party tool and only release an OEM version to Lattice softwares - Diamond or Radiant. Solution: This error does not come from Lattice but in Synplify itself. When checking the license.dat file, the license feature ...
6051- Lattice Diamond Simulation: How to run the simulation with optimization enabled using a standalone version of Modelsim or Questasim software? (Not OEM version)
1. Run Diamond’s Simulation Wizard as you normally would. The standalone version of Modelsim/Questasim should be linked within Diamond’s options instead of the OEM version (Tools > Options > Directories). 2. When Modelsim/Questasim opens, Compile the ...
7019 - OEM Modelsim: Fatal: (vsim-3693) The minimum time resolution limit (10fs) in the Verilog source is smaller than the one chosen for SystemC or VHDL units in the design. Use the vsim -t option to specify the desired resolution.
Description: When running simulation wizard directly on a design which includes a PLL, a fatal error is encountered as given below ** Fatal: (vsim-3693) The minimum time resolution limit (10fs) in the Verilog source is smaller than the one chosen for ...
6484 - ModelSim error on IP instantiation: (vsim-3033) Instantiation of 'MULTADDSUB36X36' failed. The design unit was not found.
Description: This error can occur when the Simulation tool uses the wrong libraries for your design. Solution: Go to the ModelSim File menu, then select Source Directory... Select the directory where your work library is located. Then, go to the ...
6454 - Lattice ModelSim OEM: Can we run multiple instances of ModelSim?
We cannot run multiple instances of Modelsim. This is a known limitation of our Lattice ModelSim license. Therefore, only one instance of ModelSim can run.