7743 - How to implement Gigabit Ethernet in Certus-NX, CertusPro-NX, MachXO5-NX and CrossLink-NX FPGAs?

7743 - How to implement Gigabit Ethernet in Certus-NX, CertusPro-NX, MachXO5-NX and CrossLink-NX FPGAs?

Lattice currently recommends the following for implementing Gigabit Ethernet interfaces:

  • CertusPro-NX FPGAs: Use SERDES-based SGMII or RGMII
  • Certus-NX, MachXO5-NX, and CrossLink-NX: Use RGMII

These recommendations are based on updated LVDS-based SGMII specifications due to limitations when operating across the specified temperate and voltage range. The SGMII interface CDR (Clock and Data Recovery) may lose lock when operating across temperature variations exceeding ±30°C from the initial calibration point or a voltage shift of more than ±10mv from starting VCC level. This may cause data errors on the affected SGMII interface.

Note that SERDES-based SGMII are not impacted by this limitation.

Impact

Applications operating across wide temperature ranges or voltage ranges may experience bit errors and potential packet loss may occur on the SGMII interface.

Mitigation

For customers who are early in their design cycles, Lattice currently recommends alternatives to LVDS-based SGMII, including RGMII on all impacted families or SERDES-based SGMII on CertusPro-NX FPGAs. For customers who have already incorporated LVDS- based SGMII in their designs, please contact your local Lattice Sales representative or LatticeTechnical Support.

To implement SERDES-based SGMII, in the Tri-speed Ethernet IP GUI, from the Select IP Option drop down list, select the MAC + SGMII(Serdes) or SGMII(Serdes) only options.

To implement RGMII, using the Tri-Speed Ethernet IP v2.0.0 available with Lattice Radiant 2025.1 and later, in the Tri-Speed Ethernet IP GUI, from the Select IP Option drop down list, select the MAC only option. Then choose RGMII in the Select MAC Operating Option.

Refer to the Tri-Speed Ethernet IP User Guide for more information and example designs on implementing Gigabit Ethernet interfaces.

Lattice will provide information on fully functional LVDS-based SGMII as it becomes available.