7766 - iCEcube2 Modelsim: How do I run Timing simulation for iCECube2 Devices?
In order to ran through Timing simulation for iCECube2 Devices, You would need the following Libraries:
1) sb_ice_ipenc_modelsim.v [Optional: Add this if Hardened IPs are present in your design, Example: SPI, i2C]
2) sb_ice_lc.v
3) sb_ice_syn.v
4) ice_timing_vlg
5) ABIPTBS8.v [Optional: Add this if PLL are present in your design]
6) ABIWTCZ4.v [Optional: Add this if PLL are present in your design]
Step by Step Guide to Ran Timing simulation:
1) Create a Project File > New > Project
2) Locate the project location of your simulation as desired, and provide a project name.
3) Add the needed files (Testbench File, Post Route Timing simulation File, Libraries), through the below commands (Note1: Text in blue are comments do not include them, Note2: You can create a .do file and add the below commands for quicker deployment)
vlib work #Creates a Work Library in case it does not exist on your current project.
vlog +incdir+<directory_of_file>/ -work work "<directory_of_file>/*_top_sbt.v" # Compiles the Post route timing sim file to -work directory
vlog +incdir+<directory_of_file>/ -work work "<directory_of_file>/*_top_tb.v" # Compiles the TOP testbench file to -work directory
vlog +incdir+<directory_of_sim_project>/ -work work "C:/lscc/iCEcube2.2020.12/verilog/sb_ice_ipenc_modelsim.v" # Compiles the ice40 library to -work directory
vlog +incdir+<directory_of_sim_project>/ -work work "C:/lscc/iCEcube2.2020.12/verilog/ABIPTBS8.v" # Compiles the ice40 library to -work directory
vlog +incdir+<directory_of_sim_project>/ -work work "C:/lscc/iCEcube2.2020.12/verilog/ABIWTCZ4.v" # Compiles the ice40 library to -work directory
vlog +incdir+<directory_of_sim_project>/ -work work "C:/lscc/iCEcube2.2020.12/verilog/sb_ice_syn.v" # Compiles the ice40 library to -work directory
vlog +incdir+<directory_of_sim_project>/ -work work "C:/lscc/iCEcube2.2020.12/verilog/sb_ice_lc.v" # Compiles the ice40 library to -work directory
vlog +incdir+<directory_of_sim_project>/ -work ice_timing_vlg +acc "C:/lscc/iCEcube2.2020.12/verilog/sb_ice_lc.v" # Makes sure to make use sb_ice_lc as debug library for timing simulation
vlog +incdir+<directory_of_sim_project>/ -work ice_timing_vlg +acc "C:/lscc/iCEcube2.2020.12/verilog/sb_ice_syn.v" # Makes sure to make use sb_ice_syn as debug library for timing simulation
vsim -L work -suppress 3053 -voptargs=+acc work.adar_top_tb -sdfnoerror -sdfnowarn -sdftyp /*_top_tb/dut=<directory_of_file>/adar_norm_top_sbt.sdf -Lf ice_timing_vlg # Runs the simulation and Adds in the ice_timing_vlg library, and add through the sdf file.
view wave
add wave /*
run -all
Note(Utilizing .do file instead of running commands above one by one):
a. Create a .do file
b. Run the .do file , Tools > Tcl > Execute Macro > Locate your .do file
4) Result
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