Mapping Inquiry / Failure
MachXO2: How to account for frequency tolerance when using the internal OSC?
Workaround 1: Thus, if you would like to check the oscillator tolerance, you will change the nominal value in your RTL, let MAP and PAR automatically constrain the frequency, and check the PAR Trace. If the design is passing, then it is guaranteed to ...
7733 - ECP5 / Diamond 3.14: Why does my design get a Map device oversize error related to PLL for LFE5U-12F in with Diamond 3.14, but completes map successfully in earlier releases of Diamond software?
In Diamond version 3.14, there is a bug where it incorrectly limits the number of PLLs in the device to 0 for LFE5U-12F. Example error message: ERROR - (device oversize error). The number of PLL components needed (1) exceeds the number available. ...
7641 - Lattice Avant PCIe: Map ERROR 52351076 - Instance 'u_PCIE_IP/lscc_pcie_x8_inst/secured_instance_5_1/secured_instance_4_4/secured_instance_3_0'(MPPCIEX8A_MODE) - PROTOCOL=PCIE_GEN1 cannot be supported in current device.
Solution: This MAP error is a known issue on Radiant 2024.1 SP1 when designing with Avant PCIe IP pcie_x8 v2.0.0 for LAV-AT-G70/X70. To resolve this error, install the patch on top of Radiant 2024.1 SP1 (R2024.1.1.259.1_patch23590.zip). FTP link: ...
5224 - CrossLink: How to use SPI and CDONE pins for general-purpose I/O (GPIO)?
To use SPI pins as general-purpose I/O (GPIO), disable the port option for both "Slave SPI Port" and "Master SPI Port" on the Global Preferences tab in the Spreadsheet View tool of Diamond. To use the CDONE pin as GPIO, set CDONE PORT as "CDONE_PORT ...
722 - Lattice Diamond: How can I determine what clock resources are being used in my design?
To determine what clock resources are being used, refer to the Clock Report which is found in the place and route report ("*.PAR"). Below is an example: ------------------ Clock Report ------------------ Global Clock Resources: CLK_PIN : 1 out of 6 ...
3642 - Diamond: Why does the following warning message appear in Spreadsheet View of the software when a single-ended clock pin in the design is assigned to a Primary Clock port?
Description: WARNING - Warning -The clock port [RCLK] is assigned to a non clock dedicated pin [D14], which might affect the clock performance. Solution: In the Spreadsheet View of Lattice Diamond Software, if the clock pin is assigned to a ...
2826 - Lattice Diamond: What does "APIO" stands for in the Lattice Diamond Map Report?
The term "APIO" refers to Application Specific Integrated Circuits Programmed Input Output (ASIC PIO) for Serializer-Deserializer (SerDes) I/Os. For example for a LatticeECP3-150 device ,there are 2 pairs of differential signals in each Channel (4 ...
2781 - Why do I get the message "ERROR - map: IO buffer em_ddr_data_c_0 drives IO buffer em_ddr_data_pad_0 directly, but this is not possible" on most DDR3 interface signals after instantiation of a Lattice DDR3 IP core?
This FAQ is applicable to all Lattice DDR memory controller IP cores (DDR1/DDR2/DDR3/DDR3-PHY/LPDDR). When a DDR memory interface signal uses a dedicated DDR I/O function, the DDR memory controller or PHY IP core netlist file (.ngo) includes an I/O ...
2715 - Diamond: What does the "potential loop circuits" section of the Place and Route TRACE report mean?
The "potential loop circuits" section of the TRACE report lists all paths that cannot be analyzed because of asynchronous loops in the circuit. The most common type of asynchronus loops are combinational logic loops that do not include any registers ...
332 - Lattice Diamond: Can I have the same logic assigned to different UGROUPs?
Logic is only permitted to be constrained by a UGROUP preference one time. All UGROUP preferences are mutually exclusive. When UGROUP preferences collide the second UGROUP assignment will strip logic from the first assignment. For example: When ...
5873 - ispMACH 4384 176 TQFP: Bank number for Pin 142 (GX0) is "N/A" instead of "1" on the Constraint Editor
Description: For ispMACH 4384 176 TQFP, the bank number for Pin 142 (GX0) is "N/A" instead of "1". Solution: This is a typo for this specific pin on the Constraint Editor. However, this does not affect the pin assignment. Users may check the fit ...
1293 - Lattice Diamond: MAP: How can I see what addresses my functions/variables have been mapped to? How can I get a memory map report?
Lattice Diamond: MAP: Generating a linker map file shows the memory locations the code is targetted to. This is a good way to ensure the generated program image matches the platform architecture. For example, in a certain application confirming that ...
Lattice Diamond: How to make the standalone Tcl script works for eco_design save?
Two Tcl scripts implementation: -The first one is to open the diamond project, run PAR, deploy eco_design, and create bitstream. -The second one is the script for the eco_design. >>main_script.tcl content: prj_project open ...
6895 - Diamond: How to set hysteresis of I2C pins used by ASC device?
Lattice Diamond does not show the I2C pins in the spreadsheet view but users can manually add Hysteresis using the *.lpf file.
7272 - Radiant versions 2023.1 and 2023.2 "Error 71241007 Map ERROR <71241007> - When JTAG_PORT and SLAVE_SPI_PORT are both set to user mode (disabled), at least one of SLAVE_I2C_PORT or SLAVE_I3C_PORT must be enabled"
Description: In Radiant versions 2023.1 and 2023.2, when the user sets all of the configurations ports as DISABLED on the Device Constraints Editor - Global Tab, the user will experience the following error: "Error 71241007 Map ERROR <71241007> - ...
6329 - Lattice Radiant: Why do Radiant constraint editors remove customer variables and equations in PDC (constraints) file?
TCL commands and Constraint Commands cannot be joint on to the same constraint file. The Timing and Physical constraints found in constraint file (.pdc) are the only object accepted and read by the tool. The TCL commands for setting certain variables ...
6865 - Diamond: If the Map Design summary report indicates "JTAG used: No.", does this mean that the JTAG port is disabled?
The Map report > Design Summary > "Jtag Used" field indicates if the JTAG primitive is used for the design. If you want to use JTAG primitive in your design, you need to instantiate the JTAG module.
6853 - Radiant and VHDL: How to enable open drain on I/O using RTL code?
Description: The opendrain I/O properties can be done on RTL using synthesis attribute (SynplifyPro). Solution: VHDL example: entity counter is Port ( rst,clk : in std_logic; o: out std_logic_vector(0 to 3); myoutput: out std_logic); attribute ...
7242 - Radiant versions 2023.1 and newer: Why is there a MAP DRC update on 2023.1 and newer versions of Radiant that blocks the compilation of designs with all configuration ports disabled?
In the Nexus series of devices, if you intend to utilize JTAG ports as GPIO by de-asserting JTAG_EN, then there must be another dual-use pin (e.g. I2C) that remains in “persisted” mode (e.g. I2C must stay as I2C and not become a GPIO). Keeping I2C ...
6822 - Lattice Diamond: Why does my design encounter a MAP error shown below when running the design flow?ERROR - <signal_name> matches no clock nets in the design.
Description: This is encountered if the signal is being defined (for example in constraint file) and that signal is optimized (or the net does not actually exist in the design) by the synthesis tool, To fix the error add in the following attribute to ...
6811 - Lattice iCECube2: Why does my Constraints for the output of Oscillators in iCECube2 is ignored by the tool?
Description: iCEcube2 only allows an inferred constraint on the internal OSC at its nominal value and Timing Analysis can't be set to a different frequency for the OSC as the user constraint will be ignored. Solution: This can work be around by ...
6235 - Lattice Radiant 3.1.0 : Does SEI editor tool supports CertusPro-NX?
Radiant 3.1.0.43.2 version has disabled SEI editor tool for CertusPro-NX. The later version of Radiant supports the SEI editor tool. (Ex: Radiant 3.1.1.249.0) For any other concern, file TechSupport ticket to assist you. ...
6788 - Diamond: Can users set the maximum percentage for the usage of slice on the design?
There is MAP Strategy Setting that allows user to pack their design on a certain percentage of slices/logic available on the device.
6210 - Lattice Diamond: Does the ECP3 support the COMPRESS_CONFIG(bitstream compression)?
The bitstream compression is not supported in ECP3 Devices.
6577 - Lattice Diamond: What is the meaning between black and green IC Icon in the Post Map Resources?
The Black icon means either the design is encrypted or it can be a macro. Simply saying that it is a blackbox. Green means you can view the source.
6549 - Radiant: Why does ADC design migrated from Radiant 3.1 to 3.2 fails Mapping? Map ERROR - IO Buffer '*.BB_ADC_GPIOP.SEIO18_inst' external port B cannot be connected to internal logic: '*.SEIO18_inst' port INADC.
Description: The ADC architectural Module IP has already addressed the manual instantiation of ADC primitives as it already includes the BB_ADC. Therefore, no need to instantiate it to your top level module. This is also stated on page 23 . . . "Note ...
6522 - Lattice Diamond: How do I interpret the Signal/Pad report Pin Info such as: "unused PULL:DOWN"?
In your design, having "unused, PULL:DOWN" in Signal/Pad report only states that the stated pin is not used in the design and that the GPIO is Weak Pulled low. There are no actions for user on this.
6969 - Radiant 2022.1 SP1 and SDR IP: How to solve the PAR (R2022.1.1) error or Map (R2023.1) error?
Description: From the block connections of RX Static Default for SDR, the input AND output influenced by DELAYB component inside the SDR cannot be driven by any IO logic. If data_i[i] is set to input port then data_o[i] is assigned to logic --> this ...
6448 - Lattice Diamond: Why do i encounter an "Unsupported I/O TYPE Error" for LVDS25E on my Design when ranning MAP? do i resolve error?
Description: The user is utilizing the LVDS25E on a BIDIRECTIONAL PORT in their design and is encountering the below error - "ERROR - PIO 'magic_bus_tx_pad/IOBUF' has unsupported I/O TYPE LVDS25." Or "ERROR - PIO 'magic_bus_tx_pad/IOBUF' has ...