Radiant versions 2023.1 and newer: Why is there a MAP DRC update on 2023.1 and newer versions of Radiant that blocks the compilation of designs with all configuration ports disabled?

Radiant versions 2023.1 and newer: Why is there a MAP DRC update on 2023.1 and newer versions of Radiant that blocks the compilation of designs with all configuration ports disabled?

In the Nexus series of devices, if you intend to utilize JTAG ports as GPIO by de-asserting JTAG_EN, then there must be another dual-use pin (e.g. I2C) that remains in “persisted” mode (e.g. I2C must stay as I2C and not become a GPIO). Keeping I2C “persisted” and not as GPIO is one mechanism to keep the configuration engine clock running so that JTAG_EN is sampled. 

In Radiant 2023.1, a design rule enforces that if JTAG is used as GPIO, I2C must remain “persisted” so that the JTAG_EN is sampled and JTAG pins can turn into GPIO pins. This has the negative side effect of not allowing JTAG and I2C pins to become GPIO simultaneously. Equivalently, this DRC update on 2023.1 doesn't allow the disabling of all the configuration ports. This is because designs with all configuration ports disabled might run into a hardware issue (IOs not working as expected) when tested due to the shutting down of the configuration engine.

Our recommendation for now is to enable one of the configuration ports, i.e. the I2C specifically as it has the lowest number of IO pins. At least, this has the least amount of IO pins that would be sacrificed.
 
Take note that the hardware issue mentioned above (configuration engine shutting down) only happens under specific conditions. Thus, some designs in the past compiled using 2022.1 or lower versions of the SW haven't encountered this issue and are working on hardware. Some designs that have implemented the following are not running into the issue:
  1. Instantiate one of these primitives: OSC or MULTIBOOT. This will keep the configuration engine running so that JTAG_EN is sampled.
  2. Use this synthesis directive to avoid removal of the IP or primitive: /* synthesis  syn_noprune=1 */.
 
There will be an update on the SW (2023.2 SP1) this coming March of 2024 that will fix this and allow you to compile designs with all configuration ports disabled if certain conditions are followed in the design to avoid hardware issues.