JTAG
2640 - MACHXO2: How can we recover the device from "Failed to verify the ID" when device ID is messed up?
The Device ID is always retrievable using the JTAG port. If, as in this case, you get the error: "Failed to verify the ID: Expected: 0x012BB043 Read: E4E4E4E4" (or some other value), try the following to recover the device. When Device ID reports the ...
5732 - MachXO2: Is there a way to determine the status of the JTAGENB pin from within the device using RTL?
There is no way to detect the JTAGENB using verilog/VHDL, this function acts as a switch to enable and disable the state of JTAG. In the Primitives List in the help options, the JTAGF - a primitive, is used to provide access to internal JTAG signals ...
5553 - Why in LCMXO2 part I got the following error message: ERROR - Failed in Function VERIFY_SRAM_DONE_BIT ?
The "Failed in Function VERIFY_SRAM_DONE_BIT" means that, the Diamond Programmer is unable to determine the statue of the DONE bit in the device's Status Register. This could have happened due to following reasons: The DONE bit is NOT SET due to the ...
5293 - Can Crosslink NVCM be program more than once if ONE_TIME_PROGRAM_NVCM is set to 'disable'?
No, Crosslink NVCM is one time program. ONE_TIME_PROGRAM_NVCM field has no affect since NVCM is one time programmable.
6439 - ECP5/ECP5-5G
The command LSC_READ_STATUS provides information status on the device during or after the configuration process (DONE = low).
3180 - Lattice Diamond: What are some suggestions to improve SVF programming with ICT programmer similar with the Diamond programmer?
In order to support the typical erase and programming delays, the programming algorithm must be able to read the status from the device and loop until the device has completed the erase or programming action. The SVF (Serial Vector Files) standard ...
6434 - MachXO3: What is the configuration phase time in the start-up phase of MachXO2 and MachXO3 Devices?
For older devices like MachXO2 and MachXO3, we don't have configuration phase time characterization in the start-up phase. The Product Engineering will characterize the future Devices
7152 - EIO for Nexus FPGAs: What does EIO function mean in the pinout file and the purpose of the pins?
'EIO' function mentioned in the pinout file refers to 'Early I/O Release' enhanced configuration function. Our Nexus device supports this feature to allow the I/O that reside in the I/O Banks on the left and right of the device to release earlier so ...
5250 - MachXO3L: Is the nine-times programmability always true or does the number of program cycles for an "L" part depends on the size of the design, and therefore, configuration memory utilization?
The number of erase/program cycles for the MachXO3 "L" part is fixed and 9 is the maximum limit, and it will not depend on the size of the design.
5239 - [ECP5/ECP5-5G]: How to fix "timeout error" when debugging the soft-core after programming the bitstream in the FPGA?
Divide TCK signal of JTAG by 10 on Lattice parameter.
6022 - All Nexus: Can the dedicated Pin JTAG_ENABLE still make the port active again?
Description: There is an option to disable the JTAG Port of the Nexus device in the bitstream. Solution: All Nexus devices are in compliance with IEEE 1149 (Standard Test Access Port and Boundary-Scan Architecture) and IEEE1532 (Standard for ...
4988 - What are the programming considerations for SSPIEM and I2CEM modification with Aardvark SPI/I2C APIs?
Aardvark is a SPI/I2C adapter which can be used for programming of Lattice FPGA devices with Slave SPI or Slave I2C. Lattice Diamond provides SSPIEM and I2CEM example source codes which are modified with Aardvark SSPI and I2C API’s respectively. ...
7111 - MachXO3: What does I2C bridge mean in MachXO3D?
Solution: I2C bridge refers to the JTAG to I2C bridge in MachXO3D devices. When this is locked the JTAG to I2C bridge will be disabled. This does not lock access to Slave I2C for configuration.
2106 - LatticeXP2: When re-configuring the TAG memory, how to preserve it so it will not overwritten the initial content the next time the user re-load the original bitstream?
Bitstream loads an initial TAG memory content. There is no software option to "write-protect" the content of the TAG memory when you re-load a bitstream that includes an initial TAG memory configuration. Your only option is to use two bitstreams: ...
534 - MachXO: Why can't I scan or program the MachXO device on the MachXO Mini board after I programmed my pattern into the device?
The MachXO JTAG pins on the MACHXO Mini board share the same traces with some generic IOs of the MachXO device (as shown on page 4 and page 2 of the schematic). If the new design patterns have signals driving out of these pins, they could potentially ...
7025 - All Nexus Families: How to properly perform the ISC_ERASE operation for device configuration?
See below guidelines on how to properly perform ISC_ERASE step applicable to all Nexus Families 1.) Before clocking in the bitstream into the device for configuration purposes, you need to perform the ISC_ERASE operation to ensure that the SRAM bits ...
5882 - MachXO2, MachXO3, MachXo3D: What is the complete list of Status Bit Register and their description?
Bit 0: JTAG TRANSPARENT Mode This bit will be set to '1' if the device is currently in Transparent mode. Bit [3:1]: Config Target Selection By default the configuration SRAM array (Bit [3:1] = 000) is selected as the target. Bit 4: JTAG Active This ...
6166 - Does MachXO3L support program/erase as many times as MachXO3LF?
Description: According to the Datasheet (FPGA-DS-02032), in Table 3.6. Programming/Erase Specifications, MachXO3L has a multi-time (max of 9 times) programmable NVCM while the MachXO3LF devices have reconfigurable Flash up to 100,000 write/erase ...
5739 - iCE40 Ultra Plus, Ultra/Ulralite, LP/HX: How safe is the iCE40 device configuration at power-up?
The data from the user's *.nvcm file is programmed into the NVCM. This *.nvcm file has a data CRC embedded at the end. In addition to the CRC, the configuration logic automatically generates an ECC pattern for each 64 byte page, which is stored in ...
5664 - iCE40 Ultra/UltraLite: How to resolve "Failed in Function NVCM_ENABLE" error during programming?
Two ways to resolve this is by: 1. Double check and try to interchange the TDI/SI and TDO/SO wires of the HW-USBN-2B cable. 2. If you are using a custom board, please check if you have followed the correct Power-up Supply Sequence mentioned in our ...
3766 - MachXO2: How to update the Configuration Flash of the MachXO2 in transparent mode using the svf file generated by Diamond Deployment Tool for the operation XFLASH Erase, Program, Verify?
The XFLASH Erase, Program, Verify instruction does not issue a refresh command. To update the Configuration Flash, use the XFLASH Erase, Program, Verify, Refresh operation, or power cycle the device.
6463 - CrossLink: Does Crosslink supports full background programming?
The Crosslink did not support full background programming. It is only supporting partial background re-configuration using the SEI (Software Error Injection) or read-back features. The statement in the document means that if you persisted with the ...
5592 - MachXO3: How to recover from 'Hanging" and waiting for something to continue operation?
Clearing the Configuration Memory and Re-initialization the current user mode configuration of the MachXO3L remains in operation until it is actively cleared, or power is lost. Several methods are available to clear the internal configuration memory ...
6907 - MachXO3: Does the XO3LF have a CRC check after a bit file or data frame is written in the SRAM?
Yes, XO3LF have a CRC frame on the bit file. It is shifted when using the LSC_BITSTREAM_BURST command. See CRC highlighted in red on the bit file and on the SVF file.
1943 - MachXO: With no DONE bit, how can I use JTAG to see if the SRAM download from flash is finished?
The way to check the MachXO configuration status through JTAG is to use the capture instruction. For the MachXO the capture instruction (which is the instruction shifting out of the instruction register) is 0x19 (if the device is blank) or 0x1D (if ...