6907 - MachXO3: Does the XO3LF have a CRC check after a bit file or data frame is written in the SRAM?

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• 6909 - MachXO3LF: What commands can we used on our SVF file to verify that we have written correct configuration into the SRAM?

  There are 2 ways to check if user have written correctly into the SRAM of the MachXO3LF: 1. LSC_BITSTREAM_BURST (0x7A): Using this command to program, the device will automatically check the CRC. User can then monitor the Status register or the DONE ...

• 5553 - Why in LCMXO2 part I got the following error message: ERROR - Failed in Function VERIFY_SRAM_DONE_BIT ?

  The "Failed in Function VERIFY_SRAM_DONE_BIT" means that, the Diamond Programmer is unable to determine the statue of the DONE bit in the device's Status Register. This could have happened due to following reasons: The DONE bit is NOT SET due to the ...

• 6908 - How is the CRC the bitstream (.bit) file checked in the config logic of the FPGA?

  A CRC error is caused by incorrect or corrupt data. Data is read from the primary image in rows. As each row enters the Configuration Engine the data is checked for CRC consistency. Before the data enters the Configuration SRAM the CRC must be ...

• 1943 - MachXO: With no DONE bit, how can I use JTAG to see if the SRAM download from flash is finished?

  The way to check the MachXO configuration status through JTAG is to use the capture instruction. For the MachXO the capture instruction (which is the instruction shifting out of the instruction register) is 0x19 (if the device is blank) or 0x1D (if ...

• 5882 - MachXO2, MachXO3, MachXo3D: What is the complete list of Status Bit Register and their description?

  Bit 0: JTAG TRANSPARENT Mode This bit will be set to '1' if the device is currently in Transparent mode. Bit [3:1]: Config Target Selection By default the configuration SRAM array (Bit [3:1] = 000) is selected as the target. Bit 4: JTAG Active This ...