Device Pinouts
6302 - ECP5/ECP5-5G
VSSIO is the system ground or the ground reference voltage pin of the I/O pins. You can connect the VSSIO to the GND pin.
6818 - What is the unit of Delay length and Trace Length of IO Pin layout?
The Delay length and Trace length is in picoseconds (ps), and micrometers/microns (um) respectively.
6290 - MachXO2: For NC Pins, Is it mandatory for them to have NO Connections?
NC pins can be tied to VCC, ground, left floating or used to bridge since they are not connected internally.
4076 - ECP5: While migrating device pinout from LatticeECP5-25 to LatticeECP5-85 device, how to handle the pins when some pins are notified as NC in LatticeECP5-25 and GND or RESERVED in LatticeECP5-85 device?
When migrating the device pinout from LatticeECP5-25 to LatticeECP5-85 devices, generally, the NC pins in LatticeECP5-25 pinout can be notified as GND or RESERVED pins in LatticeECP5-85. If the LatticeECP5-85 pins are notified as GND, then you can ...
6475 - What is the purpose of AGND pin?
Description: Most of the VCCIOs and Refclk are referenced to AGND pin. It is also used for shielding purposes.
6929 - What is the difference of ICE40LP1K-CM36 vs. -CM36A, and if the design can be shared on the same board?
Description: There is only 1 change between the 2 packages, which is the connection of A4 and A5 balls. For the CM36, A4 is connected to VCCIO_0_1 while A5 to VPP_FAST. Thus, the board should have A4(VCCIO_0_1) and A5(VPP_FAST) connected together ...
157 - I am migrating from LatticeECP3 device/package to another LatticeECP3 device/package. Is there a description of the differences between the various devices and packages?
LatticeECP3 pinout and migration files can be found on the LatticeECP3 Web Page. On the left side of the window, select Data Sheets You will see a list of the most current versions of the following: LatticeECP3 Data sheet & Errata Pinout (.csv) files ...
5615 - Crosslink: Is the pin-out for the LIA-MD6000-81 identical to the pinout for the LIF-MD6000-csfBGA81? I can download the Excel pinouts for the 'LIF' Crosslink family, but I cannot find separate documentation for the Crosslink Automotive device.
For the pinout information of automotive parts, you may check FPGA-DS-02013, link: http://www.latticesemi.com/view_document?document_id=51753 They are of the same pinout information for LIF variants which is described in FPGA-DS-02007, link: ...