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6135 - Crosslink-NX: What is the difference between the Crosslink-NX evaluation boards LIFCL-40-EVN and LIFCL-40-EVNG?
LIFCL-40-EVN and LIFCL-40-EVNG are the same boards. The added G on the part number is just an internal classification but rest assured that all of its features and functions are all the same.
325 - How can I estimate the pull up and pull down resistors of Lattice's CPLD and FPGA devices?
User can find I/O Active Pull-up Current (Ipu), I/O Active Pull-down Current (Ipd), and the voltage for the I/O ports (e.g., Vccio) in Lattice's data sheets. User can derive the pull up and pull down resistor values by dividing the voltage by the ...
4076 - ECP5: While migrating device pinout from LatticeECP5-25 to LatticeECP5-85 device, how to handle the pins when some pins are notified as NC in LatticeECP5-25 and GND or RESERVED in LatticeECP5-85 device?
When migrating the device pinout from LatticeECP5-25 to LatticeECP5-85 devices, generally, the NC pins in LatticeECP5-25 pinout can be notified as GND or RESERVED pins in LatticeECP5-85. If the LatticeECP5-85 pins are notified as GND, then you can ...
3755 - iCE40: Why did the iCEstick board get damaged while loading a bitmap to iCEstick's FLASH memory? How to recover the damaged board?
While loading a bitmap to iCEstick's flash memory ensure that: - In your design no dedicated General Purpose Input/Output (GPIO) pin has been used as an output pin. If, for example, pin 21 has been assigned for output, please replace it with another ...
7748 - Why is there a mismatch between the hardware checklist and the evaluation board circuit design?
Description: The customer has observed discrepancies between the design recommendations provided in the Hardware Checklist and the actual design implementation on the Lattice Evaluation Board. Reason: Hardware Checklists are developed after ...