PCIe PCS
1000 - How can I implement multiple protocols within a PCS quad (Protocol A RX, Protocol B, TX, etc) on ECP2M and ECP3?
For LatticeECP2M devices, all the four channels in a quad must be configured for the same protocol. In LatticeECP3 device family, multiple protocols within one quad of SERDES is supported. The standards are required to have the same reference clock ...
991 - In LatticeECP2M external LSM mode, how does the word aligner hunt for comma during word alignment?
When attribute CHx_COMMA_ALIGN is set to "DYNAMIC", the protocol specific Link State Machines are bypassed. In that case, the word aligner will lock alignment (it will stop comparing the incoming data to the user-defined word alignment characters and ...
263 - What is the difference between Quad Based Protocol Mode and Channel Based
Protocol Mode?
When in Quad Based Protocol Mode, the four channels in the same quad will be configured to the same rate -- either full-data-rate mode(Reference Clock Multiplier set to 10X or 20X) or half-data-rate mode(Reference Clock Multiplier set to 10XH or ...
6220 - CertusPro-NX: How to select the external SerDes reference clock (SD_EXT_x_REFCLKn) of MPCS?
By using MPCS, the user does not need to specify the location of SD_EXT_x_REFCLKn using a constraint file. Example snippet of the implementation: DIFFCLKIO DIFFCLKIO_inst ( .CLKIN0_P (sd_ext_0_p_i), .CLKIN0_N (sd_ext_0_n_i), .CLKIN1_P (), .CLKIN1_N ...