263 - What is the difference between Quad Based Protocol Mode and Channel Based Protocol Mode?

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• 1000 - How can I implement multiple protocols within a PCS quad (Protocol A RX, Protocol B, TX, etc) on ECP2M and ECP3?

  For LatticeECP2M devices, all the four channels in a quad must be configured for the same protocol. In LatticeECP3 device family, multiple protocols within one quad of SERDES is supported. The standards are required to have the same reference clock ...

• 766 - SERDES can run at either full-data-rate mode or half-data-rate mode What is the difference between the two?

  With the same reference clock frequency, if the SERDES is configured to half-data-rate mode, the SERDES data rate is only half of the data rate supported in the full-data-rate mode. It is useful when different rates are used for different channels in ...

• 6446 - CertusPro-NX SERDES: Should the unused channel/s on a SerDes Quad be powered?

  Solution: The only requirement is to power-up the channel 1 of the used quad even if this channel is unused. The rest of the unused channel/s can be left floating or not connected. Refer to Section 13.5 of the CertusPro-NX SerDes/PCS User Guide ...

• 768 - Can SERDES use different configurations and different reference clock frequencies to support the same data rate?

  Yes. Here we are using 300Mbps as an example. When in 10-bit SERDES Only mode, the reference clock frequency (Fref) can be either 30MHz or 60MHz to support 300Mbps data rate. Any of the following configuration settings can be used to support 300Mbps ...

• 1527 - LatticeECP3: Why is the SERDES Quad C powered by VCCIB instead of supplying 1.2v, or 1.5v with passive filtering?

  The SERDES Quad C of LatticeECP3 FPGA on the Video Protocol board is reserved for HDMI/DVI interface. The HDMI/DVI interface is using TMDS signaling which has a common mode voltage around 3V and a differential swing range of 400-600mV. In order for ...