5809 - MIPI: What workaround to use when Single Ended inputs in Bank 1/2 when Soft D-PHY is assigned to a bank?
To workaround this is to use the MIPI primitive to allow a pseudo LVCMOS12 interface:
MIPI LVSD12_inst0 (
.AP (1'b0),
.AN (1'b0),
.HSSEL (1'b0),
.TP (1'b1),
.TN (1'b1),
.OLSP (int_a),
.OLSN (int_b),
.OHS (),
.BP (pin_a),
.BN (pin_b))
/* synthesis DIR_PIN_BP="INPUT" */
/* synthesis DIR_PIN_BN="INPUT" */;
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