7786 - Do MachXO2 and MachXO3 Devices support Soft I²C IP?
7786 - Do MachXO2 and MachXO3 Devices support Soft I²C IP?
Description
Lattice XO2 and XO3 devices do not natively support the conventional I²C Soft IP provided in Propel. Customers who require I²C functionality must use the reference designs provided by Lattice Semiconductor.
To implement I²C communication, Lattice offers reference designs that provide tested implementations for both Controller and Target configurations.
Use the following Lattice reference designs for XO2/XO3 devices as reference:
Description DisplayPort TX IP version 2.1.0 requires the video input to provide blanking interval between active horizontal video lines to ensure correct video data packing. Failure symptoms include no video image output or black screen, even though ...
For ECP5 non-5G devices, PCIe Endpoint IP is to be used. This IP can only support up to Gen1 speed (2.5 Gbps data rate). For ECP5 5G devices, PCIe-5G Endpoint IP is to be used. This IP supports both Gen1 and Gen2 speed (5 Gbps data rate). After ...
Solution: The following RDs available for Crosslink-NX will support the said applications: 1. FPGA-RD-02212 : N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation - Aggregate multiple Image Sensors into a single Output with Minimal Latency. - Uses ...
Yes, the DDR3 SDRAM controller IP support DDR3L 1.5V operation. It also supports 1.35V operation, but SSTL15 should be changed to SSTL135. Refer to the ECP5 and ECP5-5G sysIO Usage Guide (FPGA-TN-02032).