Lattice Radiant: Why am I getting setup timing violations while using pmi_fifo_dc IP with HARD_IP implementation?

Lattice Radiant: Why am I getting setup timing violations while using pmi_fifo_dc IP with HARD_IP implementation?

To fix the CDC path violations, please use the following constraints:

set_max_delay -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/FULL] -to [get_pins -hierarchical \{*/*.full_r.*_inst/LSR}] 4
set_max_delay -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/ALMOSTFULL] -to [get_pins -hierarchical \{*/*.afull_r.*_inst/LSR}] 4

set_max_delay -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/EMPTY] -to [get_pins -hierarchical \{*/*.empty_r*.*_inst/LSR}] 4
set_max_delay -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/ALMOSTEMPTY] -to [get_pins -hierarchical \{*/*.aempty_r*.*_inst/LSR}] 4

set_false_path -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/EMPTY] -to [get_pins -hierarchical */*.FIFO16K_MODE_inst/EMPTYI]
set_false_path -from [get_pins -hierarchical */*.FIFO16K_MODE_inst/FULL] -to [get_pins -hierarchical */*.FIFO16K_MODE_inst/FULLI]