7263 - Lattice Diamond: Are the hold window analysis violations observed on the Timing Analysis View valid timing violations? Do users need to make sure that these are passing even though they are not blocking bitstream generation?

7263 - Lattice Diamond: Are the hold window analysis violations observed on the Timing Analysis View valid timing violations? Do users need to make sure that these are passing even though they are not blocking bitstream generation?

Even though PAR timing did not show any timing violations, users/designers must check the Timing Analysis View for hold window violations. 

Hold Window analysis is only for boundary paths, i.e. paths involving input or output ports specified with an INPUT_SETUP or CLOCK_TO_OUT preference.