Diamond: Is there a section or a tool where user can find the metastable CDC paths and if they are properly handled or not with FIFO or synchronizer FFs?<br><br>

Diamond: Is there a section or a tool where user can find the metastable CDC paths and if they are properly handled or not with FIFO or synchronizer FFs?<br><br>

In the timing report, there is a Clock Domains Analysis (CDC) section. It doesn't report if the CDC is handled properly through synchronizers or FIFOs. 

This should be the designer's responsibility, as we currently do not have a DRC that checks for this. However, the CDC section will show if a clock has any cross clock crossing paths to other clock domains.  

From here, user can manually check the concerned paths on the RTL and do the necessary update if needed.