Understanding ADC Calibration and Accuracy Using %FS_ADC on the Nexus Platform
Understanding ADC Calibration and Accuracy
When working with precision analog-to-digital conversion (ADC) systems, especially in low-voltage applications, achieving accurate and repeatable results is critical. Customers often encounter discrepancies between expected and measured ADC values—particularly at voltages below 0.9V—leading to concerns about calibration validity and compliance with datasheet specifications. This article addresses common questions around ADC offset error, calibration procedures, and overall accuracy, drawing from real-world measurement scenarios and clarifying key technical points to help users achieve reliable results.
ADC Calibration Sequence: A Prerequisite for Accurate Results
One of the most frequent sources of unexpected ADC behavior lies in the timing and sequence of calibration and conversion operations. The ADC calibration process is not optional—it is a mandatory step to ensure that the conversion results fall within the specified accuracy limits. According to Figure 3.1 and Figure 3.2 of the Nexus ADC User Guide, the calibration ready signal (adc_calrdy_o) must be asserted before initiating any ADC conversion via the adc_soc_i signal.
If conversions are performed without completing calibration, the resulting data can exhibit significant offset errors, gain drift, or non-linearity, even if the device is otherwise functioning correctly. This is especially noticeable at low input voltages, where small deviations are magnified relative to the full-scale range. In the case described, the observed deviation of several millivolts(mV) below ideal values at voltages below 0.9V may stem from conversions being executed prior to calibration completion.
To resolve this, ensure that your firmware or control logic strictly follows the recommended sequence:
- Initiate ADC calibration.
- Wait for
adc_calrdy_oto go high, indicating calibration is complete. - Only then assert
adc_soc_ito start a conversion.
Failure to adhere to this sequence invalidates the guaranteed performance metrics, including the ±2FS_ADC offset error specification. Even if the device is operating within its electrical limits, the absence of proper calibration means the results cannot be trusted for accuracy-critical applications.
Interpreting ADC Offset Error: Clarifying the Datasheet Specification
A common point of confusion arises from the interpretation of the ADC offset error specification listed in the datasheet. The stated value of ±2 LSB ADC Offset Error on CertusPro-NX, CrossLink-NX and MachXO5-NX Family Datasheets has led some users to question its validity, particularly when measured results appear to exceed this limit. However, the root of the issue lies in the unit of measurement.
The correct unit for ADC offset error is ±2 %FS_ADC ADC Offset Error, not LSB. This is a documented internal error in the datasheet, and the specification should be understood as a percentage of the full-scale ADC range, not a fixed number of least significant bits. For a 12-bit ADC with a reference voltage of 1.8V, the full-scale range is 1.8V, and 1 LSB corresponds to approximately 0.439mV (1.8V / 4096). Therefore, ±2LSB would equate to about ±0.878mV.
However, when expressed as %FS_ADC, the offset error is calculated relative to the full-scale voltage. For example, if the offset error is ±0.1% of full scale, this translates to ±1.8mV, which is significantly larger than ±2LSB. This explains why some measurements appear to exceed the ±2LSB threshold—because the specification was misinterpreted.
This clarification is essential: the ±2LSB value is not a standalone metric but part of a broader accuracy model. Relying solely on offset error without considering other error sources leads to an incomplete and potentially misleading assessment of ADC performance.
Total Unadjusted Error (TUE): The Complete Picture of ADC Accuracy
While offset error is important, it is only one component of overall ADC accuracy. To fully understand the deviation between measured and ideal values, especially in low-voltage regions, it is necessary to consider the Total Unadjusted Error (TUE). TUE accounts for the combined effect of multiple error sources:
- ADC Offset Error (ADC_Oe): The deviation of the ADC output from zero when the input is zero.
- ADC Gain Error (ADC_Ge): The deviation in the slope of the transfer function.
- ADC INL Error (ADC_INLe): Integral Non-linearity, which measures how much the actual transfer function deviates from a straight line.
- ADC DNL Error (ADC_DNLe): Differential Non-linearity, which measures the deviation of step sizes from the ideal 1 LSB.
These errors are not independent; they accumulate and interact. The most accurate way to estimate TUE is through a root-sum-square (RSS) combination:
TUE = sqrt(|ADC_Oe|² + |ADC_Ge|² + |ADC_INLe|² + |ADC_DNLe|²)
Once TUE is calculated, it can be converted to a percentage of full scale using:
%FS_ADC = TUE / 4096 * 100
For example, if the offset error alone is 0.1%FS_ADC (1.8mV), and the gain error is 0.05%FS_ADC (0.9mV), the combined TUE would be approximately 0.112%FS_ADC, or about 2.016mV. This is well within the expected range of real-world performance and explains why individual measurements may show deviations larger than ±2LSB when viewed in isolation.
Conclusion
In summary, accurate evaluation of ADC performance depends on both proper calibration sequencing and correct interpretation of accuracy specifications, particularly the use of %FS_ADC as the primary accuracy metric. The ADC offset error specified as ±2%FS_ADC is defined relative to the full‑scale ADC range, not in absolute LSB terms. This distinction is critical, as offsets measured at low input voltages can appear large in LSBs while still remaining fully compliant when evaluated against the full‑scale range. Misinterpreting this specification as a fixed ±2 LSB limit can therefore lead to incorrect conclusions about ADC accuracy and device compliance.
Furthermore, ADC offset error should never be evaluated in isolation. The appropriate method for assessing ADC accuracy is through Total Unadjusted Error (TUE), which combines offset, gain, INL, and DNL errors using an RMS approach and expresses the result as %FS_ADC. When calibration is performed correctly and TUE remains within the specified ±2%FS_ADC limit, the ADC behavior is operating as intended and within datasheet guarantees—even if individual measurements at low voltages show millivolt‑level deviations. Applying %FS_ADC consistently ensures a realistic, system‑level understanding of ADC performance and avoids over‑constraining designs based on incomplete or misinterpreted metrics.
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