990 - Are there any pins that can't be used when the SERDES is being used?

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• 351 - How do the VCCIB pins on the LatticeECP3 need to be connected if the SERDES receive inputs (HDIN) are not being used?

  If the SERDES receive input (HDIN) signals are not being used, you have the following options for connecting VCCIB: The LatticeECP3 SERDES input block can be powered down. When the SERDES input logic is not powered it is not necessary to connect the ...

• 1102 - All FPGAs: Does Lattice PCIe IP support SERDES pins polarity inversion and PCIe lanes reversal?

  Description: The PCIe specification provides a dedicated layout of the PCIe lanes on the connector. Due to the fixed location of the SERDES pins on Lattice device packages aligning package pins to PCIe lanes can either work perfectly or create a ...

• 1720 - LatticeECP3: If I am not using one of the SERDES/PCS quads of my device, are there any special considerations as far as layout is concerned? If I don't want to use a quad of SERDES/PCS, what should I do with SERDES/PCS power and signal pins?

  If you are not using SERDES/PCS, you need to do the following steps: 1. Connect power: VCCA and ground VSSA; 2. Let other power domains (VCCIB and VCCOB) floating; 3. Let the other signal pins such as ;HDINP/N, HDOUTP/N and REF-CLKP/N floating. all ...

• 2888 - How to handle unused power supply inputs for SERDES channels for the LatticeECP2/M device?

  The SERDES design provides separate final stage Rx and Tx power nodes for each CML input and output buffer. These are identified as VCCIB and VCCOB for LatticeECP2/M. These allow the receiver input termination (50 Ohm, 75 Ohm, 2K Ohm) and transmitter ...

• 6446 - CertusPro-NX SERDES: Should the unused channel/s on a SerDes Quad be powered?

  Solution: The only requirement is to power-up the channel 1 of the used quad even if this channel is unused. The rest of the unused channel/s can be left floating or not connected. Refer to Section 13.5 of the CertusPro-NX SerDes/PCS User Guide ...