CertusPro-NX only supports the hard IP block PCIe link layer on Quad 0. For more information, refer to second paragraph of section '11.1. PCI Express Mode' on FPGA-TN-02245.
The PCI Express Link Layer Quad for all CertusPro-NX devices has four PIPE interfaces that can be used in different number of links. This can provide the maximum flexibility, depending on the bandwidth of the application requirements. The PCIe link ...
Solution: The RTL fix will be release on the new IP version (pciex4 ver. 2.40). Gen 3x1 (before fix) Gen 3x1 (after fix) Gen3x4 (before fix) Gen3x4 (after fix) pl_link_up 150us 218us 39us 39us dl_link_up 634us 253us 76us 76us
Description: The following operation will causes the host PC to crash. - Run Batch Test with Write Operation checked. Solution: Please use the 'Throughput Test' tab instead of the 'Batch Test' tab as it will causes the GUI to crash. Please unselect ...
The PCI Express x1 and x4 IP Core is supported by both SC and ECP2 device families. The minimal ECP2M device needed to support the core is LFE2M-20E-6F484C, and the minimal SC device needed is LFSC3GA15E-6F900C. Newer Lattice FPGA families that ...