3024 - <span id="lf104285">What are the various ways to produce RAM/ROM in a design? What is the power up state or content of an inferred RAM?</span>
There are two ways to produce RAM and ROM in a design.
You can write code for the design so that the synthesis tool infers the memory or you can instantiate predefined IPexpress or PMI (Parametrized Module Instantiation) memory modules.
Inferring
memory means that synthesis tool, based on aspects of the code,
implements a block of memory using programmable function units (PFU) or
embedded block RAM (EBR)—PFU for small memories, EBR for large—instead
of registers.
One of the advantages of inferring memory is that the
design is portable to almost any FPGA architecture.
PMI modules, on the
other hand, are optimized for Lattice FPGAs, and IPexpress
modules are optimized for just one FPGA family. Also, because the
inferred memory is not a black box, the tool has full access to
timing and area data. However, there may be less efficient use of
the FPGA architecture. Also, not all kinds of memory can be inferred. In
these situations you may prefer to use IPexpress or PMI modules. With these modules you can also use Memory Generator to easily create memory initialization files.The inferred RAM will be initialized to all zeros after Power Up Reset if not specified. You can also set initial values.
For
more information about inferring memory, you can refer to Lattice
Diamond Software Help > Entering the Design > HDL Design Entry > Coding
Tips for Lattice Synthesis Engine (LSE) > About Inferring Memory.
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