7154 - PMI RAM for Nexus FPGAs: Why is Radiant implementing Large RAM block when using "pmi_ram_dq" and "pmi_family" settings in the design, instead of the EBR block as expected?

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• 3024 - <span id="lf104285">What are the various ways to produce RAM/ROM in a design? What is the power up state or content of an inferred RAM?</span>

  There are two ways to produce RAM and ROM in a design. You can write code for the design so that the synthesis tool infers the memory or you can instantiate predefined IPexpress or PMI (Parametrized Module Instantiation) memory modules.Inferring ...

• 3626 - LatticeECP2/M/ECP3/ECP5/ECP5-5G: Can we disable the Reset Signal for RAM_DQ, RAM_DP and RAM_DP_TRUE in our design?

  The reset signals for the Embedded Block RAM (EBR) based RAM_DQ, RAM_DP, and RAM-DP_TRUE reset only the output registers, not the EBR memory contents. So, if you do not want to reset the output registers of these modules in your design, you can ...

• 3538 - Diamond / EBR: Is there an easy way to modify some Embedded Block RAM (EBR) data before running bitgen with encryption enabled?

  Solution:To modify the Embedded Block RAM (EBR) data through command line, use medit command. User can follow below steps- 1. Load the test project and check the path by using the "pwd" command in Tcl Console. By default, it navigates to the /test ...

• 6650 - Nexus : Can we monitor the voltage of Block Ram with Nexus ADC?

  Description: The voltage of Block Ram is shared with the Vcc power rail. Also, Block Ram has no sub-power rail to access and monitor it.

• 1412 - Can I implement Error Check Codes in the Embedded Block Ram (EBR) based memory modules?<BR>

  IPexpress allows you to implement Error Check Codes (ECC) in the Embedded Block Ram (EBR) based memory modules. There is a checkbox to enable ECC in the configuration tab for the module. If you choose to use ECC, you will have a 2-bit error signal ...