2533 - LatticeECP2M/ECP3: How can I access the full rate recovered clock to sample the receive data in a Lattice X1 Native PCIe IP targeting either LatticeECP2M or LatticeECP3 devices?

2533 - LatticeECP2M/ECP3: How can I access the full rate recovered clock to sample the receive data in a Lattice X1 Native PCIe IP targeting either LatticeECP2M or LatticeECP3 devices?

Description:

The X1 Native PCI Express IP uses the embedded Clock Tolerance Compensation FIFO in the LatticeECP2M/ECP3 SERDES. The receive data coming out of the FIFO is synchronous to the tx_full_clk. This clock should be used if you need to sample the parallel receive data for debugging purpose.

For more information on CTC FIFO clocking options, you can refer to LatticeECP3 SERDES/PCS Usage Guide at https://www.latticesemi.com/view_document?document_id=32316  

If the target device is LatticeECP2M, you can refer to LatticeECP2/M SERDES/PCS Usage Guide at https://www.latticesemi.com/view_document?document_id=21734