1748 - Common Public Radio Interface - IP Core: Do I need to use a clock cleaner when using CPRI IP core (Common Public Radio Interface) with Lattice SERDES based FPGA?

1748 - Common Public Radio Interface - IP Core: Do I need to use a clock cleaner when using CPRI IP core (Common Public Radio Interface) with Lattice SERDES based FPGA?

Lattice CPRI IP core (Common Public Radio Interface) supports LatticeECP2/M, LatticeECP3 and LatticeSC.
When using the CPRI IP core in REC(Radio Equipment Control,master) mode, it's not necessary to use a clock cleaner since the system provides the master clock source already.
When using the CPRI IP core in RE(Radio Equipment, slave) mode, since the recovered clock (which is provided from the far end REC) will be used in loop timing mode to drive the returning serial data back to the REC device, the recover clock is required to go through a clock cleaning device, which will lower the Tx jitter and ensure that SERDES Tx port send out data and the SERDES Tx output port meets the system jitter requirement defined in CPRI standard, thus can cause system failure.