1101 - All FPGAs: Why do some PCIe slots run slower than others?
Description:
PCIe uses credits to control the flow of TLPs from transmitter to receiver. The amount of credits a port supports directly impacts the throughput of that port. High throughput PCIe slots such as x16 and x8 typically provide 32 or 64 write credits. Low throughput PCIe slots such as x1 typically provide only 8 or 16 write credits.
With a low credit value the transmitting device can only send a few TLPs before the receiver runs out of credits. Now the transmitter must wait until the receiver releases credits by processing the data. With large credit buffers the receiver has more time to process the data and release the credits before all of the credits are used.
Below are some typical PCIe Gen1 (2.5Gbps) numbers for a given link width and write credit buffer.
x1 with 8 PD - 80MB/s
x1 with 16 PD - 120MB/s
x4 with 32 PD - 400MB/s
x4 with 64 PD - 700MB/s