1. Create a new Radiant project targeting CertusPro-NX.
2. Select IP on Server and install the latest version of PCIE_X4 IP, if it is not yet installed.
3. Switch to IP on Local, double-click PCIE_X4 and enter your desired Component name.
4. Parameterize the PCIE_X4, for simulation purpose, it is important to tick the Simulation Reduce Timeout option. Other parameters can be left as default (or changed). Click Generate and Finish.
5. The Testbench Files will be generated during PCIE_X4 IP generation.
6. Click Radiant's 'Simulation Wizard' to initiate the wizard and create a new simulation project by entering your "Project name'.
7. Click icon ‘Add simulation source files’, add the tb_top.v file.
8. Select tb_top as Simulation Top Module.
9. Follow the below simulation settings. Set Default Run to 0.
10. QuestaSim Lattice-Edition will be launched, close this window because Xcelium Standalone full edition need to launch in later step.
11. Compile the ‘lfcpnx’ library for Xcelium Standalone full edition.
i) The existing device library is compiled for Questasim Lattice-Edition, so it is necessary to recompile for Xcelium Standalone full edition.
ii) In Radiant Tcl Console pane, execute below command (use Radiant 2025.1 or onwards).
cmpl_libs -64 -sim_path <Xcelium_FullVersion_path> -sim_vendor cadence -device lfcpnx -target_path <your_target_path>
Example:
cmpl_libs -64 -sim_path /tools/dist/cadence/XCELIUM/XCELIUM23.03_g453/Linux/tools.lnx86/bin -sim_vendor cadence -device lfcpnx -target_path /home/CPNX_PCIe/SIM1
12. Open the generated “<project>.f” in your simulation project folder, edit the -reflib as below.
From:
To:
Note: The lfcpnx folder at line#2 above is the library compiled during Step 11.
Line#10 is to save the simulation log file (it is optional).
13. Run your <project>.f file using Xcelium
Example: xrun -v_XCELIUM23.03_g453 -64bit -f /home/CPNX_PCIe/SIM1/SIM1.f
14. Wait for the simulation to complete.