1100 - How can I use the complimentary outputs in Lattice FPGAs? <br>

1100 - How can I use the complimentary outputs in Lattice FPGAs? <br>

Most Lattice FPGA devices provide a complimentary output feature which allows a single ended buffer to provide its compliment on a different pin without using any FPGA logic resources or user routing. To enable this complimentary path the user needs to select a specific IO_TYPE for the output port.

IO_TYPEs which provide a complimentary output driver contain a 'D', for "differential", added to the IO_TYPE name. Below is a list of IO_TYPEs which provide the complimentary output driver. This list is not specific to any particular Lattice FPGA device so please check the specific datasheet to make sure the selected device supports the IO_TYPE.

LVTTL33D
LVCMOS33D, LVCMOS25D, LVCMOS18D, LVCMOS15D, LVCMOS12D
HSTL18D_I, HSTL18D_II
HSTL15D_I, HSTL15D_II
SSTL33D_I, SSTL33D_II
SSTL25D_I, SSTL25D_II
SSTL18D_I, SSTL18D_II

When using the IO_TYPE for a complimentary output, the complimentary output does not need to appear in the top level port list of the design. Only the true port needs to be present in the top level design. After place and route you will see the true and compliment pins listed in the PAD report file. Below is an example of how this information is provided.


Pinout by Port Name:
+-----------+----------+----------------+-------+
| Port Name | Pin/Bank | Buffer Type    | Site  |
+-----------+----------+----------------+-------+
| VREF1_7   | L6/7     | VREF1_DRIVER   | PL25C |
| clk       | P3/6     | LVCMOS25_IN    | PL30B |
| din       | R8/7     | HSTL15_I_IN    | PL27D |
| dout      | N2/6     | LVCMOS25D_OUT  | PL29A |
+-----------+----------+----------------+-------+

Notice above that the dout port is shown as the true polarity only. The IO_TYPE is LVCMOS25D so the complimentary output driver is enabled.

Pinout by Pin Number:
+----------+----------+---------------+-------+
| Pin/Bank | Pin Info | Buffer Type   | Site  |
+----------+----------+---------------+-------+
...
| N1/6     | dout-    | LVCMOS25D_OUT | PL29B |
| N2/6     | dout+    | LVCMOS25D_OUT | PL29A |
...

Notice above how the port dout is now identified as using two pins. Pin N2 for the true and pin N1 for the compliment.