7486 - Where can I find the 3D model of Lattice FPGAs?

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• 1100 - How can I use the complimentary outputs in Lattice FPGAs? <br>

  Most Lattice FPGA devices provide a complimentary output feature which allows a single ended buffer to provide its compliment on a different pin without using any FPGA logic resources or user routing. To enable this complimentary path the user needs ...

• 543 - Do Lattice FPGAs support Spread-Spectrum Clocking (SSC)?

  There are two aspects to SSC support: SSC generation and SSC reception. Only the LatticeSC family provides SSC generation support. Refer to TN1099, "LatticeSC sysCLOCK PLL/DLL User’s Guide" for more information (search for "spread spectrum"). ...

• 2598 - Can Lattice FPGAs use a general purpose I/O to assert it's own PROGRAMN pin?

  Lattice does not recommend using the FPGA's general purpose I/O to assert its own PROGRAMN pin. There is risk the FPGA may not restart after the first attempt to assert the PROGRAMN pin. The PROGRAMN pin can inadvertently be pulled low, which can ...

• 3812 - How to find the number of gates available for a Lattice device?<br>

  Lattice does not have any data regarding the gate counts for a device. Only the Look-Up Table (LUT) counts are available for a device. The reason is that an LUT can be configured in an end design either as INVERTER or 4 input AND gate. The actual ...

• 6137 - Lattice FPGAs: How to interpret the Date Code breakdown?

  Description: For the date code, it represents the current date when the device was processed: First Digit = Current Decade Second digit = Last digit of Current Year Third and Fourth digit = Current Work Week Example, date code 1024 represents 2010 ...