7097 - Radiant: Why the registers not initialized properly during netlist simulation and hardware validation?

7097 - Radiant: Why the registers not initialized properly during netlist simulation and hardware validation?

Description: Similar description and explanation with FAQ-7241. Solution: When using VHDL for your design please check if you are using Synplify Pro as synthesizing tool. Lattice Synthesis Engine (LSE) currently have issues with VHDL. Using Synplify Pro allows correct initialization of register values with VHDL at netlist simulation and hardware validation.