Description:
The user can use the synthesis attribute syn_useioff to perform the two conditions: moving Register (FF) to IOB pins or move IOB to an internal Register (FF).
Solution:
Verilog example:
module test (a, b, clk, rst, d) /* synthesis syn_useioff = 1 */;
VHDL example:
architecture archtest of test is
signal temp : std_logic;
signal temp1 : std_logic;
signal temp2 : std_logic;
signal temp3 : std_logic;
attribute syn_useioff : boolean;
attribute syn_useioff of archtest : architecture is true;
The user can check the map report under "IO (PIO) Attributes" to check if it is properly applied.
On the otherhand, the user can also check the physical viewer to know if it is properly applied.
If "syn_useioff = 1" is applied, it implements the register to IOB or packed into the IO.
If "syn_useioff = 0" is applied, it implements the register to LUTS.