Please refer to below information: I3C IP User Guide : https://www.latticesemi.com/products/designsoftwareandip/intellectualproperty/ipcore/ipcores04/i3c-controller Navigate to the IPUG from the link: Documentation > Quick Reference > User Manual > ...
Lattice CPRI IP core (Common Public Radio Interface) supports LatticeECP2/M, LatticeECP3 and LatticeSC. When using the CPRI IP core in REC(Radio Equipment Control,master) mode, it's not necessary to use a clock cleaner since the system provides the ...
For LatticeECP3 device, we provide equalization series loopback for system debug. The equalization series loopback means that the data from high speed input pins (HDINP/N) serially loopback to high speed output pins (HDOUTP/N) via equalization ...
Referring to the Small Form-factor Pluggable (SFP) Transceiver MultiSource Agreement (MSA), the LatticeECP3 SERDES inputs and outputs are compatible with the specification. This allows for a very clean interface between the module and the fpga. The ...
The following Lattice demo kits are available for utilizing the 7:1 LVDS Reference Design: - ECP3 Video Protocol Board http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/LatticeECP3VideoProtocolBoard.aspx Refer to RD1030, 7:1 LVDS Video ...