Modify the rdo_rx_pcs_rst_c logic based on the RSL documentation. 1. Open the *_softlogic.v, look for the rdo_rx_pcs_rst_c. Add the input for the OR logic such as rdi_rx_los_low_s, rdi_rx_cdr_lol_s and rui_rx_pcs_rst_c. 2. Open the IP RTL ...
By using MPCS, the user does not need to specify the location of SD_EXT_x_REFCLKn using a constraint file. Example snippet of the implementation: DIFFCLKIO DIFFCLKIO_inst ( .CLKIN0_P (sd_ext_0_p_i), .CLKIN0_N (sd_ext_0_n_i), .CLKIN1_P (), .CLKIN1_N ...
Solution: The MPCS IP has an update that added the FVCO checker. It is available on Radiant 2023.2 or later. In case the user cannot upgrade to the said version, kindly file techsupport ticket to have an appropriate software patch. ...
Description: From FPGA-TN-02245-1-1-CertusPro-NX-SerDes-PCS-User-Guide of the Appendix C. Calculating Parameters for SerDes PLL, it shows the available data rates with respect to the reference clock. However in any case that the desired data rate for ...
Solution: The only requirement is to power-up the channel 1 of the used quad even if this channel is unused. The rest of the unused channel/s can be left floating or not connected. Refer to Section 13.5 of the CertusPro-NX SerDes/PCS User Guide ...