6233 - SLVS-EC Receiver IP Core: How to Set Reference Clock Frequency of SLVS-EC Rx IP core?

6233 - SLVS-EC Receiver IP Core: How to Set Reference Clock Frequency of SLVS-EC Rx IP core?

The “reference clock” corresponds to the IP port refclk_*. This port represents the differential clock of the internal MPCS PLL. It can be sourced from any clock signal capable of generating the MPCS clock frequency specified in the “MPCS Clock Frequency” field.
 
As of now, the default value for this clock is 125 MHz. For further details, refer to the MPCS IP User Guide: https://www.latticesemi.com/view_document?document_id=53089