5715 - ECP5/ECP5-5G: Do we need a tmwc(Additional Wakeup Master Clock after DONE pin is high) at ECP5 (like at ECP3 = 100 - 500 additional clock cycles)? If yes, what value?
ECP3 and ECP5 are different designs, even though there was an effort to make the ECP5 wakeup sequence behavior as same as ECP3 while developing ECP5, there is a structural difference between them. In term of the tMWC (Additional Wakeup Master Clock after DONE pin is high), it should be ZERO for ECP5.
The ECP3 wakeup FSM running on the port clock needs extra an clock to finish the whole wakeup sequence (the DONE pin might be released early in the sequence for some options). But for ECP5, the wakeup FSM running on an internal oscillator clock is independent of the external port, so an additional clock from port is not necessary.