5263 - CrossLink: In soft MIPI DPHY RX, should the clock be placed only on PCLK pins? and Can the clock also be placed on MIPI_CLK/GR_PCLK/GPLL pins?
The Clock should be placed only on PCLK pins and they cannot be placed on MIPI_CLK/GR_PCLK/GPLL pins.
Only following pins may be used for MIPI CLK: PCLKC2_0, PCLKT2_0, PCLKC2_1, PCLKT2_1, PCLKC1_0, PCLKT1_0, PCLKC1_1 & PCLKT1_1.
Also, The tool will generate the error if user uses a non-PCLK pin.
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5621 - Crosslink: Can Hard-DPHY receive SLVS 200 signals which have not MIPI protocol?
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6149 - Crosslink: In dphy_rx_wrap_beh.v, how do user resolve error related to port size mismatch?
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