5154 - MachXO3: In doing background programming with transFR enabled, how does the pin re-configured from being an input to bidi and it's behavior as bidi when device is power cycled?
The I/O electrical properties like drive strength, slew rate, open-drain, pull modes are preserved from the Initial Programming.
These settings are not cleared unless the device is power-cycled or loaded with a new bitstream to overwrite these settings.
In this case, since we have enabled TransFR, while the new bitstream is being loaded, only the internal fabric is changed, but the IO settings from the initial programming will be still preserved.
Though the new bitstream is loaded, the I/O settings will not change until the device is power-cycled.
Any other reinitialization techniques like toggling PROGRAMN, Issuing REFRESH, or Erase SRAM commands will not clear the IO settings in this case,
and only the Power-cycling (Power-off and Power-on) the device will ensure that the new bitstream settings for the IOs have taken effect.
Thus, this behavior is true for MachXO and MachXO3 family as well. Since we are using TransFR to lock the IO settings, it does not let the IO logic to clear the settings unless the device is powered off and on.