2200 - [LatticeECP2/N] What are the factors affecting the CCLK frequency setting for Lattice ECP2M SPI Flash configuration?
Assuming the frequency of the SPI Flash is not the limiting factor, there are two factors affecting CCLK frequency setting of Lattice ECP2M device in SPI Flash configuration mode:
1. fMAXSPI
This is the maximum frequency that the internal configuration logic in SPI Flash mode can run at. This parameter is specified as 50 MHz in the Lattice ECP2M Datasheet.
2. CCLK Frequency
In SPI Flash mode, the CCLK pin is driven by an internal oscillator. The oscillator has selectable frequencies (MCCLK_FREQ) ranging from 2.5 MHz to 130 MHz. The frequency has a variation of +/- 30% due to PVT variation.
Assuming you choose 41 MHz as the MCCLK_FREQ. The actual of frequency of CCLK can vary between 28.7 MHz to 53.3 MHz factoring in the 30% variation. The upper end of the frequency violates fMAXSPI so MCCLK_FREQ of 41MHz cannot be used.
The next lower MCCLK_FREQ is 34 MHz. CCLK can vary between 23.8MHZ to 44.2 MHz, well within fMAXSPI requirement. So 34MHz is the highest setting for MCCLK_FREQ for Lattice ECP2M device in SPI flash mode.
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