105 - How can I determine if a LatticeXP2 FPGA configured from internal flash or from an external SPI flash?

105 - How can I determine if a LatticeXP2 FPGA configured from internal flash or from an external SPI flash?

The LatticeXP2 can be setup to operate in dual boot mode. Dual boot mode permits the LatticeXP2 to attempt to load a "working" configuration bitstream, and if that bitstream fails to properly configure the FPGA for a "golden" or "failsafe" bitstream to be loaded, improving system reliability.

Each Lattice FPGA provides a 32-bit Usercode register. The Usercode register can be programmed with a unique value for each configuration bitstream to be loaded into the FPGA. The Usercode register value can be assigned using either the Pre-Map Design Planner (ispLever), Spreadsheet View (Diamond), or Universal File Writer (UFW, from ispVM System).

The Usercode can be read from the LatticeXP2 using JTAG accesses. This can be done using ispVM System in a development environment, or from ispVM Embedded (ispVME). ispVME is C source code that permits a microcontroller to control the JTAG pins on the FPGA to read the Usercode register.

For Example:

  • The on die Flash bitstream has a Usercode value assigned to "PatA". 32 bits can only store 4 ASCII characters
  • The bitstream for the external SPI Flash has a Usercode value assigned to "PatB".
  • The Usercode is interrogated using JTAG, permitting you to determine the bitstream used to configure the LatticeXP2.