7044 - MachXO2/XO3: How to have successful dual-boot with SPI flash with MachXO2/MachXO3 devices?
7044 - MachXO2/XO3: How to have successful dual-boot with SPI flash with MachXO2/MachXO3 devices?
To have successful dual-boot for MachXO2/MachXO3 please change CRC settings of the generated bitstream of Lattice Diamond Software using the Deployment tool. See below for the steps: 1.Open Deployment Tool then select File Conversion and Bitstream:
2. Select the bitstream .bit file then press next. 3. Set the CRC calculation to Frame CRC. 4. Generate new bitstream: Take note that this bitstream setting modification is only used for EXTERNAL SPI FLASH. For internal flash, always use the jed file generated.
The MachXO2 has a dual boot feature that works in an automatic mode. If the image loaded from the internal flash is found to have an issue (CRC error), or if the internal flash is erased, then the part will automatically try to load the golden image ...
Description: MACHXO3 device share the same SPI SysConfig ports for both SSPI and MSPI configuration mode. The Configuration(CFG) MSPI is designed to be bus friendly, i.e. when it's not actively booting, all MSPI pins are tri-stated. It's possible to ...
While using Dual Boot Mode, the configuration time (time required for the bitstream to get configured inside the device) from Internal Flash is less. Data transfer is faster because the Internal Flash interface with SRAM is parallel, whereas it is a ...
See below for steps on how to perform Dual-Boot in MachXO5-NX Background: The current implementation of Dual-Boot is that the JUMP table is found at Address 0. We are changing the implementation of Dual-Boot as below. For this new implementation, the ...
Solution: You can read the Flash and SRAM Status Register using ispVM or Diamond Programmer. Here are the steps to follow: 1)) Device powers up check the DONE SRAM Status Register (1=Device booted successfully, 0=Device did not boot successfully) 2) ...