2111 - How can to select between 2 different clocks and avoid gating it using fabric resources?

2111 - How can to select between 2 different clocks and avoid gating it using fabric resources?

FPGA devices has a Digital Clock Select (DCS) primitive/component. These primitives/components allow the user to do clock selection without leaving primary clock routing. For more information, in each architecture, please refer to sysCLOCK technical note for that device family.