DCS is a global clock buffer incorporating a smart multiplexer function that takes two independent input clock sources and avoids glitches or runt pulses on the output clock, regardless of where the enable signal is toggled. When selection input is toggled, the DCS looks for the current clock waveform as well as the new clock waveform. When one clock input is not operating, the simulation will not work because there is no current clock wave for information. The hardware will switch from in-operative clock to working clock eventually but may suffer additional delay for DCS output to settle down to active clock. If user must switch between inactive clock and active clock, regular mux must be used. For more details, refer to Lattice Technical note, TN1178: LatticeECP3 sysCLOCK/PLL Design and Usage Guide.
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