114 - Active HDL: hanging after loading waveforms
Description:
This can sometimes happen if you have the same variable being used in different loops.
Solution:
In the example below, it is recommended that you define a new integer variable for the second always block and the simulator will not hang anymore.
integer ii; ... always @(*) for(ii=0;iirxclk4[ii] = rxclk_250[ii]; ... always @(*) for(ii=0;iitxclk4[ii] = txclk_250[ii];
Note: This happens for Verilog-based simulations only.
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