Simulation: ALDEC Active-HDL: To see the design hierarchy for a given signal do the following:
1. Invoke the Active-HDL Waveform Editor.
2. Move your mouse over to the column header at the top of the Waveform Editor (e.g. "Name", "Value", etc).
3. Right click to "Columns" -> "Hierarchy"
4. You will see the "Hierarchy" column appear. Note that the hierarchy does not include the testbench level. i.e. Hierarchy starts at the top level of the design.