Interface & Protocol IPs | PCIe X8

PCIe x8
PCIe IP Soft-DMA Mode: DMA Reset Required on Error Interrupt Detection
Description: In PCIe Soft-DMA mode, when an error condition occurs, the DMA IP asserts an interrupt to notify the Host of the detected error. If this interrupt is not properly handled and the DMA is not reset, the system may enter an unrecoverable ...
2691 - PCI Express IP: Why does the TXPLL no longer lock in my PCIe design when I migrate to the latest version of the Lattice PCI Express IP?
Version 5.2 of the Lattice PCI Express IP includes an update to use the reset sequence (instead of the 4ms reset timer) requiring the reference clock from the SERDES to be enabled to the fabric. You likely use a .txt file from an earlier version ...

Interface & Protocol IPs | PCIe X8 | Knowledge Base