Why FPGA Programming Failure When JTAG Chain Has 7 or More Devices?

DESCRIPTION

When programming Lattice FPGA devices via SPI Flash using a JTAG chain, the Erase-Program-Verify (EPV) operation fails deterministically starting from the 7th device in the chain. Chains of 6 devices or fewer complete SPI Flash EPV without issue.

The failure pattern is consistent and reproducible:

1–6 devices in JTAG chain → SPI Flash programming succeeds
7 or more devices in JTAG chain → programming fails on device 7 onward

This has been confirmed on MachXO5-NX. Other Lattice FPGA device families using SPI Flash programming via JTAG may also be affected.

RESOLUTION

A Radiant 2025.2 software patch was deployed as a workaround for this issue.
Please submit an Existing Software Patch request and reference this FAQ to request for: Patch 32062.
The patch resolves the programming failure observed on device 7 onward
The fix is also planned for inclusion in a future official Radiant release.

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Why FPGA Programming Failure When JTAG Chain Has 7 or More Devices?

Why FPGA Programming Failure When JTAG Chain Has 7 or More Devices?

DESCRIPTION

RESOLUTION

Related Articles

7757 - Radiant Programmer: What is Erase, Program, Verify Quad 1 operation used for?

6179 - How do user program Lattice FPGA after programming a bitstream to the SPI Flash with JTAG_PORT and MASTER_SPI_PORT set to DISABLED?

7745 - Avant Rev 03x: Why program Quad SPI Flash Programming failed with JTAG2SPI Bridge

6186 - Lattice Radiant Programmer: How user can Flash FPGA binary file (.rbt) and Propel SDK (RISC-V) binary file to Lattice FPGA?

2301 - What&nbsp;are the differences between the specific SPI Flash devices listed in the Lattice programming &nbsp;software tool?

2301 - What are the differences between the specific SPI Flash devices listed in the Lattice programming software tool?