6036 - MachXO3: Is it possible that Flash USERCODE and SRAM USERCODE can be different during programming and read mode?

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• 2313 - LatticeXP2: Is it possible to program the LatticeXP2 SRAM directly using slave SPI mode?

  Solution: No, you cannot program SRAM in SLAVE SPI(SSPI) mode. SSPI can only be utilized to program and verify an encrypted or standard JEDEC file into embedded configuration Flash in background mode. It can be used to read the SRAM fuse cells in ...

• 7757 - Radiant Programmer: What is Erase, Program, Verify Quad 1 operation used for?

  Description: Erase, Program, Verify Quad 1 enables that QE bit to '1'. In general, there are two (2) requirements/steps to enable booting from external SPI Flash through x4 (QUAD Mode) Step 1 - Convert the bitstream file into hex (Quad I/O read mode) ...

• 3287 - MachXO2: In Dual Boot Programming mode, does programming the external flash erases the internal flash; and does programming the internal flash leave the external flash intact?

  Programming the external flash erases the internal flash. However, programming the internal flash does not affect the external flash. For a detailed procedure on dual boot programming, refer to the Dual Boot Demonstration section in EB61, MachXO2 ...

• 7315 - MACHXO3: Why I cannot perform SPI programming after enable dual boot to configure from external SPI flash

  Description: MACHXO3 device share the same SPI SysConfig ports for both SSPI and MSPI configuration mode. The Configuration(CFG) MSPI is designed to be bus friendly, i.e. when it's not actively booting, all MSPI pins are tri-stated. It's possible to ...

• 6260 - Radiant version 3.0 or earlier: How to solve Nexus Platform SRAM programming issue?

  Description: In Radiant 3.0 or earlier version, the sysConfig has default setting for the JTAG_PORT as DISABLED. So it could lead to JTAG access issue on the device after loading the generated bitstream into the SPI Flash. Solution: As a workaround, ...