6021 - MachXO3: The I2C engine was continuously generating a clock pulse when forced into an idle state via I2C_1_CR/I2C_2_CR register. Is this an expected behavior? If so, Is there any workaround to move it to an idle state or reset the I2C engine?

6021 - MachXO3: The I2C engine was continuously generating a clock pulse when forced into an idle state via I2C_1_CR/I2C_2_CR register. Is this an expected behavior? If so, Is there any workaround to move it to an idle state or reset the I2C engine?

Writing the I2C_1_CR/I2C_2_CR register from the system host could rest the logic on the system clock domain but will not rest anything in the SCL clock domain.

Issuing a STOP condition from any I2C master via I2C_1_CMDR / I2C_2_CMDR will reset the I2C engine and issue a START condition to resume normal design operation.