5992 - iceCube2 : How to simulate the inferred memory in iCecube2.

Solution:

Here are some guidelines to test this.

1. To perform RTL simulation:
a. Click the "Run Active-HDL" icon within iCEcube2 and do not change the default project location on the first window of the simulation wizard.
b. make sure line 12 of the Top.v source file is commented out: parameter INITFILE = "../../../../Source/mem_init.hex"; // Remove comments when performing RTL simulation (Within Aldec)
//parameter INITFILE = "../../Source/mem_init.hex"; // Remove comments when running in iCEcube2. (From Synthesis to PAR)

2. To perform Gate-Level Simulation:
a. Click the "Run Active-HDL" icon within iCEcube2 and do not change the default project location on the first window of the simulation wizard.
b. make sure line 11 of the Top.v source file is commented out:
//parameter INITFILE = "../../../../Source/mem_init.hex"; // Remove comments when performing RTL simulation (Within Aldec)
parameter INITFILE = "../../Source/mem_init.hex"; // Remove comments when running in iCEcube2. (From Synthesis to PAR)

3. To generate the bitstream file, make sure that you follow step 2b.

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5992 - iceCube2 : How to simulate the inferred memory in iCecube2.

5992 - iceCube2 : How to simulate the inferred memory in iCecube2.

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