5706 - MachXO2/XO3/XO3D: If the input voltage for input pins is over 3.6V or under -0.3V, will there be any problem?
The input signal of more than 3.6 but not greater than (VIHmax + 2 v ) and under -2 v is permitted. However, it should be around 20 ns only; otherwise, the device will be damaged. Please refer to the Device Data Sheet and look for DC and Switching Characteristics.
Related Articles
2516 - MachXO:
What is the meaning of "I/O Tristate Voltage Applied" and "Dedicated Input Voltage Applied" specified in the Absolute Maximum Ratings section of MachXO data sheet?
Solution: There are two cases where an IO pad is driven by an external source. One is the case of a dedicated input pad, and the other is a bi-directional IO pad in which its output can be tri-stated. The "Dedicated Input Voltage Applied" and "I/O ...
1433 - Platform Manager/Power Manger II: How do I protect VMON input pins from noise or accidental spikes?
The absolute maximum input voltage for the VMON input pins is 6V. Any inadvertent stresses beyond this limit will damage the device. Thus, protection circuits (like using a 5.1V shunt Zener diode) are recommended to guard the VMON input pins against ...
2070 - Power Manager II: What is the POR state of I2C controlled input and output pins in POWR1014A?
Description:Input pins that are "controlled" by I2C remain in high impedance (high-Z) state as they are not bidirectional pins and they are always inputs. Output pins that are controlled by I2C, will follow the behavior as listed in Table "I2C ...
4657 - ECP2, ECP3, ECP5, MachXO, MachXO2, MachXO3: What is the permitted maximum undershoot/overshoot voltage of a particular device?
Description: Undershoot and overshoot of -2 V to (Vihmax +2) V is permitted for a duration of less than 20 ns. This applies to the following device families: ECP2, ECP3, ECP5, MachXO, MachXO2, MachXO3. For more information, refer to the Absolute ...
6498 - XO/ECP: What is the expected GPLL input clock tR and tF requirements for XO2, XO3, ECP3 and ECP5 ?
For XO2, XO3 and ECP3/ECP5 the expected rise/fall time are shown below: Parameter Descriptions Conditions Max (ns) tR Input clock rise time 10% to 90% 1.0 tF Input clock fall time 90% to 10% 1.0