5507 - Power Controller: How to turn off the bandgap so that right after the device enters user mode, it will be with the bandgap disabled?

Please follow the following steps:

a. Instantiate the "Power Controller" module available from the IPExpress.

b. In the IPExpress GUI, select/tick the options "Enable Standby flags", and "Turn off Bandgap when in Standby".

c. Now, to turn off the Bandgap, there are two ways:

1. Develop a logic/FSM that drives the "USERSTDBY" input of the Power Controller module within the design. A rising edge of this signal begins the shut-down sequence to enter standby. A falling edge of this signal begins the wake-up sequence from standby.

2. The second way is Hardwiring. The user can have the "DONE" pin hardwired to "USERSTDBY", so that immediately after the configuration the bandgap is turned off. For this, the user needs to bring the USERSTDBY port to an external pin on the device and connect it to the DONE pin externally. The user also needs to have enabled the DONE persistence in the Spreadsheet View, Global preferences tab.

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5507 - Power Controller: How to turn off the bandgap so that right after the device enters user mode, it will be with the bandgap disabled?

5507 - Power Controller: How to turn off the bandgap so that right after the device enters user mode, it will be with the bandgap disabled?

Related Articles

5512 - Power Controller: What does Standby Mode mean?

6173 - MachXO3: In the event full device power-down does not proceed or occur, could VCCIO be restored and user-mode resume without performing a device re-configuration?

2994 - MachXO2: If the device is not yet programmed, it will be booted in Default Mode Feature Row. Will the INITn pin automatically be used as an input? And can I (accidently) block the configuration of the FPGA by pulling INITn low?

413 - How do I implement Power-Off Detection in a Power Manager II device ?

2356 - LatticeECP3: Can I lock the dual-link 7:1 LVDS pins to the left and right sides of a LatticeECP3-17EA device? <br>