Description DisplayPort TX IP version 2.1.0 requires the video input to provide blanking interval between active horizontal video lines to ensure correct video data packing. Failure symptoms include no video image output or black screen, even though ...
The IP (Intellectual Property) reset signals of the Lattice IP cores are not connected to the GSR components by default. Hence, the users can connect their end design reset signals to the GSR component.
Yes. Lattice's 2D Scaler IP core can be configured in either "Single-color Plane" mode or "Multi-color Plane" mode. In "Single-color Plane" mode, the scaler core can be instantiated three times to process the RGB or YCbCr color planes in parallel; in ...
Description: The Lattice PCIe (Peripheral Component Interconnect Express) IP (Intellectual Property) core asserts all MSI one after the other. The Lattice PCIe (Peripheral Component Interconnect Express) IP (Intellectual Property) can handle up to 8 ...
Lattice CPRI IP core (Common Public Radio Interface) itself provides the auto-negotiation function. There is a state machine that will automatically go through a searching state from one line rate to the next line rate, eventually it will find the ...